The purpose of this information is to discuss how to improve the efficiency of PLC operation and shorten the execution time when completing the same task. Allow lower performance products to fulfill higher performance processing requirements
(Remind here: beginners do not need to care about the method summarized in this article, aiming at easy-to-read procedures and specifications, and completing the functional requirements)
1. When you can use "words" (such as VW units), try to avoid "double words" (VD units). When you can use integers, try to avoid real numbers / floating-point numbers.
2. Preferential use of surplus (other than hardware connection) IB, IW, ID, QB, QW, QD, followed by M, S;
3. Reduce unnecessary network scanning, classify the networks that can be set to execute (especially AIW, AQW) into subroutines for conditional calls (such as timed interrupts);
4. Under the premise of ensuring the process requirements, appropriately reduce the frequency of interruptions;
5. Subprograms should minimize the number of condition judgments and normalize subprogram import and export parameters to reduce code redundancy.
6. If SM0.0 is connected in series with other signals, it only increases the program size and execution time, and has no other effect (if the network has met the necessary contacts on the left, there is no need to connect SM0.0 in series);
7. For subprogram calls with less input data, you can first determine whether the input data has changed. If there is no change (for comparison, please refer to the 48th floor), you can skip the subprogram directly, thereby reducing the scanning cycle.
8. Reasonable use of immediate IO instructions (reduce the use of them as much as possible) to save the conversion time for PLC to process immediate instructions.
9. Use the calculation result memory as much as possible in the calculation instead of the transitional memory.
10. To avoid data type conversion, when you have to use it, try to use AC to store intermediate variables to reduce the number of conversions. Or reserve the storage space when programming, for example: when using VW2 to store integers, VW0 is not used, you can directly access the data in VW2 in the form of VD0;
11. Use the XOR instruction to achieve any bit inversion (this instruction is slightly difficult, and it needs more serious alignment during debugging);
12. For repetitive and time-consuming tasks, it should be processed in cycles; among them: allocate the initialization work to multiple cycles to complete. Make the sampling time of multiple PID loops slightly different to avoid generating multiple interrupt calls in the same cycle and make the scanning cycle more uniform and stable.
13. As far as possible, arrange the bit variables in the V area within V511.7, and arrange the VB / VW / VD variables with high frequency of use in V4095, which can shorten the program scanning cycle.
14. When there is no need to share signals, multiple instructions placed in the same network will generate additional stack entry and exit operations (which can be converted to STL for analysis), which also increases program size and execution time. It ’s more compact.
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